1. Field of the Invention
The present invention is related a semiconductor device formed by tri-dimensionally laminating multiple semiconductor elements. Especially, the present invention is related a semiconductor device formed with a POP (Package on Package) made up of at least two substrates in which one packaging substrate is electrically connected another packaging substrate.
2. Discussion of the Background
In accordance with recent developments in electronic equipment, semiconductor devices be used in electronic equipment are required be more compact, thinner, more diversified, and more highly functional and integrated. To respond such demands, the structure of semiconductor-device packaging is becoming tridimensional with multiple stacked semiconductor devices or multiple semiconductor elements. Japanese Laid-Open Patent Publication 2004-273938 describes a stacked semiconductor device where a semiconductor element is sandwiched between a first wiring substrate and a second wiring substrate and the first wiring substrate and the second wiring substrate are electrically connected by solder bumps. The contents of this publication are incorporated herein by reference in their entirety.